Responsive to the instantaneous potential level of an analog signal, analog-to-digital (ADC) converters are operative to develop a number (i) of digital signals, the state of which represent, in binary notation, the instantaneous potential level of the analog signal. The more digital signals (binary bits) developed, the more accurate the representation.
The conversion process requires a period of time, which varies depending upon the conversion process employed. Where high conversion speed is required, analog-to-digital converters of the "flash-type" are used. Typically, flash-type analog-to-digital converters employ an analog-to-thermometer-code converter driving a thermometer-code-to-one-of-n converter (encoder) driving a one-of-n-to-binary-code (digital) converter (where n equals two to the ith power).
Typically, analog-to-thermometer-code converters include a number (two to the ith power) of resistors and a number (two to the ith power minus one) of comparators. The resistors, which are each of similar resistance, are connected in series (to form a resistor string) between a pair of reference potentials, to develop at the resistor-resistor junctions (nodes) a series (two to the ith power minus one) of reference potentials. Typically, the comparators are each configured, with the comparator inverting input connected to the corresponding one of the resistor-resistor junctions (nodes) to receive the corresponding one of the reference potentials; with the comparator non-inverting input connected to a line to receive the analog signal; and with the comparator output connected to form the corresponding one of the converter outputs.
When so configured, each of the comparators which is connected to a reference potential that is higher in potential level than the instantaneous potential level of the analog signal, develops, at the comparator output, a low logic level potential, which is, also, referred to herein as a logical "zero". Conversely, when so configured, each of the comparators which is connected to a reference potential that is lower in potential level than the instantaneous potential level of the analog signal, develops, at the comparator output, a high logic level potential, which is, also, referred to herein as a logical "one". Thus, the instantaneous potential level of the analog signal can be seen to lie between the lowest level reference potential which is connected to a comparator that is developing a low logic level potential (a zero) at it's output and the highest level reference potential which is connected to a comparator that is developing a high logic level potential (a one) at it's output. In other words, the instantaneous potential level of the analog signal is fixed by the zero-to-one transition of the comparator output signals.
Thermometer-code-to-one-of-n converters, typically, include a number (two to the ith power minus one) of AND (or NAND) gates (one for each comparator). Typically, each of the gates is of the two input type. One of the gates (which corresponds to the comparator which is connected to the highest level reference potential) has two true (non-negated) inputs. This gate is configured, with one of the gate inputs connected to the output of the highest level reference potential comparator; with the other gate input connected to the output of the comparator which is connected to the next highest level reference potential; and with the gate output connected to form a corresponding one of the converter outputs. The rest of the gates each have a negated (inverted) (complemented) input and a true (non-negated) input. These gates are each configured, (to detect a zero-one pattern) with the true (non-negated) input connected to the output of the corresponding one of the comparators (to detect the one); with the negated-input connected to the output of the comparator which is connected to the next highest level reference potential (to detect the zero); and with the gate output connected to form a corresponding one of the converter outputs. (Of course, an inverter driving a true (non-negated) gate input, functions as an negated input.)
When so configured, when no comparator errors (misfirings) occurs, each of the gates, but one, develops, at the gate output, a low logic level potential (a zero). The gate developing a high logic level potential (a one) corresponds to the comparator which is connected to the highest level reference potential that is lower in potential level than the instantaneous potential level of the analog signal (the zero-to-one transition point comparator). Unfortunately, when comparator errors (misfirings) do occurs, it is not uncommon for the associated one-of-n-to-binary-code (digital) converter to develop digital signals, the state of which represent a number that is substantially different than the instantaneous potential level of the analog signal.
Another thermometer-code-to-one-of-n converter is disclosed in the talk by Willard K. Bucklen, presented at MIDCON/79, and published in an Application Note entitled "Monolithic Bipolar Circuits For Video Speed Data Conversion", by TRW, LSI Products Division, TRW Electronic Components Group, P. O. Box 2472, La Jolla, CA 92038, dated Oct. 1979 (TRW-LSI Publication TP2-10/79). The Willard K. Bucklen converter includes AND gates, all but two of which have three inputs. One of the three-input AND gate inputs is of the negated (inverted) type; and, two of the AND gate inputs are of the true (non-negated) type. These gates are each configured to detect a zero-one-one pattern. More specifically, these gates are configured, with one of the true (non-negated) inputs connected to the output of the corresponding one of the comparators (to detect one of the ones); with the negated-input connected to the output of the comparator which is connected to the next highest level reference potential (to detect the zero); with the other one of the true (non-negated) inputs connected to the output of the comparator which is connected to the next lowest level reference potential (to detect the other one); and with the gate output connected to form a corresponding one of the converter outputs.
It is indicated in the Willard K. Bucklen article that the three-input AND gates, which detect a zero-one-one pattern, protect against "comparator misfirings within the range of zeros." Unfortunately, however, such protection is limited to but a single comparator misfiring within the zero range.
Another flash-type analog-to-digital converter is disclosed in the talk by Toshiro Tsukada, Yuuischi Nakatani, Eiki Imaizumi, Yoshitomi Toba, and Seiichi Ueda, entitled "Session II: Consumer ICs WAM 2.7: CMOS 8b 25 MHz Flash ADC", given at the 1985 IEEE International Solid-State Circuits Conference, and published in the "Digest Of Technical Papers, on pages 34 and 35 (0193-6530/85/0000-0034$01.00). The Toshiro Tsukada et al flash-type analog-to-digital converter employs an analog-to-thermometer-code converter driving a thermometer-code-to-gray-code converter driving a gray-code-to-binary-code (digital) converter.
Because of the nature of the gray code, when comparator errors (misfirings) occur, the number represented by the digital signals developed by the associated gray-code-to-binary-code (digital) converter is generally much closer in value to the instantaneous potential level of the analog signal. Unfortunately, the use of a thermometer-code-to-gray-code converter and a gray-code-to-binary-code (digital) converter result in relatively more complex analog-to-digital converter.